The present invention generally relates to synthesis of high bandwidth, digitally modulated waveforms at microwave and millimeter wave frequencies and, more particularly, to a multiplying digital-to-analog converter (DAC) that exploits techniques of distributed amplification, also referred to as traveling wave amplification, to synthesize high resolution radio frequency (RF) signals at microwave and millimeter wave frequencies and above without mixer up-conversion, and with a clock rate that can be much lower than the RF output frequency.
While conventional superheterodyne architectures (e.g., a transceiver that uses a local oscillator to up-convert a baseband signal for modulation of an RF carrier) have yielded excellent performance in a wide range of RF transceivers, the power consumption, size, and cost of such systems have often been limiting factors in their design and deployment. An often cited “holy grail” for RF transceivers is to incorporate a single element which accepts digital data as an input and directly produces a modulated RF output for transmission via an antenna. Although a number of “bits-to-RF” direct synthesis approaches have previously been implemented, these techniques have not been able to reach microwave or millimeter wave frequencies with the resolutions, bandwidths, and tuning characteristics that are all simultaneously needed in broadband communications systems.
For example, U.S. Pat. No. 5,128,674 to Kong et al., incorporated herein by reference, discloses essentially a single quadrant multiplying design with current level shifting circuits at the input and output which allow two quadrants (in the current-voltage plane) to be covered in an NPN-only design. The shifting operation will limit the bandwidth, and the impedance properties of the single-ended design limit the achievable RF frequency and resolution (e.g., number of bits in a data word). U.S. Pat. No. 5,134,400 to Hash, incorporated herein by reference, corrects the impedance properties to support microwave frequency operation, but relies upon high electron mobility transistor (HEMT) or metal Schottky field effect transistor (MESFET) switches and R-2R resistor ladders. Requiring a HEMT or MESFET technology will limit the attainable resolution, and the RC (resistance-capacitance) time constants associated with resistor ladders inhibit the realizable data rates (e.g., adversely affecting bandwidth). U.S. Pat. No. 5,394,122 to Conway et al., incorporated herein by reference, makes use of power splitters, power combiners, RF switches, and a programmable attenuator and does not comprise a solution that can be integrated to support increasingly higher resolutions (for example, resolutions increasing beyond three bits and more) or higher data rates (e.g., 1.0 Giga-bits/second (Gbit/s) and greater).
As can be seen, there is a need for a direct “bits-to-RF” digital-to-analog (D/A) conversion to support the synthesis of high bandwidth, digitally modulated waveforms at microwave and millimeter wave frequencies. There is also a need for the ability to support high resolution signals over a wide bandwidth at microwave and millimeter-wave frequencies with a clock rate that can be much lower than the output (RF) frequency.